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Flip Flops
Over the next three weeks, I want to take a look at flip flops.  This week we will discuss the SR Flip Flop, next week we will discuss the D Flip Flop which will lead into week three, the Shift Register.
A Flip Flop is a kind of one-bit memory cell.  It stores a value that can be read at a later time.  The SR Flip Flop or Set – Reset Flip Flop is a good place to start because it is asynchronous.  It does what you tell it to do immediately, there is no clock and no delay.  Other Flip Flops will only transition on the rising or falling edge of a clock signal.  More about that next week.

NOR Gate SR Flip Flops
The Flip Flop can be based on several different types of gates.  The cross coupled NOR gate has four inputs. The first is the Set input the last is the Reset input.  The other two are each connected to the output of the other gate.  The second input is connected to the output of the second NOR gate. The third input is connected to the output of the first NOR gate.  The crossing of these two lines from the output of one to the input of another gives rise to the term “cross coupled.” The second and third input are not accessible to the outside user.
In a NOR Flip Flop, the resting state is both S and R equal to zero or low.  When the Set input is raised to high the output of the first NOR gate goes high and stays high even after the input is brought back to the low state.  Likewise, if the output of the first Flip Flop is high and the Reset pin is raised to the high state, the output of the first flip flop will go to zero and remain there even after the Reset pin returns to the low state.
The output of the first Flip Flop is called Q and the output of the second is.  The two outputs are always opposite; if one is high the other is low and vice versa.  They are complimentary.
There is a combination of inputs that are not allowed.  This is when both the Set and Reset pins are both high.  This sets up a race condition and the output is not predictable.  There are special types of Flip Flops that are said to be dominant.  An S dominant device will produce a high output if both the S and R inputs are raised and lowered simultaneously.  This however is never a desirable thing to do.

Other types of gates
Another way to make an SR Flip Flop is to use cross coupled NAND gates.  This type of device functions with S and R high for the resting state and active low.  Otherwise it functions the same as the NOR Flip Flop.  You can also make Flip Flops from cross coupled transistors and a series of OR, AND and inverters.
One of the things you can to with an SR NAND Flip Flop is to de-bounce a switch.  Imagine a single pole double throw switch with the common terminal connected to ground.  Each of the switch outputs goes to one of the SR Flip Flops inputs.  You will need pullups on the inputs.  Now the output will change the first time the switch makes contact with ground for that position but it will not change back even if the switch bounces sending a series of high low to the S or R inputs because of the way the SR Flip Flop functions.
There are many other uses of the SR Flip Flop in logic circuits where the SR Flip Flop is the output stage of the circuit and logic gates are set up to turn something on or off based on a given condition.

Final thoughts
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