Introduction
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D Flip Flop does the job
The D-type Flip Flop (DFF) is the workhorse of logic devices. It is a single bit memory device. The device comes in many variations, but the most basic device has an input, D, for data or delay, and Q, which is the output. It also has a clock input. The value, 0 or 1, that is present on the D input will be transferred to the Q output at a specified time in the clock cycle. What that means is that some devices will move the data on the rising edge of the clock transition and others will move it on the falling edge. You don’t get to change this, it is the way the device is built. If you want to switch from rising to falling edge it will require a chip change.
Many devices have some ‘nice’ additional pins. S for set, will set the output regardless of the input. R will reset the output, again regardless of input. An additional Ǭ is just the complement of Q.
Buffer that data
One thing you can do with DFF’s is to put one on each data line to form a buffer. Toggling the clock line will capture what is on the input and present it to the output as long as the circuit is powered. You can, of course, find a latch in standard byte lengths, but is you need 3, 5 or 9 you are in a bit of a pinch. Using individual gates is a way to tailor the circuit to your needs.
Shift Register
By placing DFF in series, that is connecting the Q of the first device to the D of the next device and connecting all the clocks together, you can create a shift register. This is a serial in parallel out device and the number of output bits is configured by you at the time of design.
Final thoughts
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#22: D Flip Flops
